Embedded Systems Projects with C++ and Verilog

FPGA programming with Verilog for lock system

The FPGA programming is a powerful tool that drives AI-accelerated chips, telecoms, defense, aerospace, and more. Using a shift register for parallel processing works like an engine’s on/off rhythm to accomplish simultaneous tasks.

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FPGA programming Digital system design

I have often wondered how microprocessors and silicon chips are designed until I came across this interesting digital design subject. Learning with Quartus and Verilog showed me how the brain of modern tech is built.

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Simple Traffic Light 🚥

C++ OOP coding on a simple traffic light system.

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Smart Bin with Power Saving Feature

Smart bin that opens on approach, detects and displays trash levels — powered by Arduino. Features include a transistor-controlled relay, PIR motion sensor for efficient power use. Sensors: Ultrasonic, PIR. Actuators: Servo motor, LCD, LED.

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Assembly Language Programming

Assembly programming with a PIC microcontroller. Completing this coursework sharpened my understanding of both code and the architecture that runs it at the binary level.

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Card Reader with Arduino

Simple motor speed control with arduino.

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Arduino motor speed control

Reading and writing system of a card system using Arduino.

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37 Sensors and actuators C++ code and Arduino interactions

The sensor and actuators modules include- Blutooth, GPS module, Gyroscope, card reader, temperature and humidity module, DS18B20 Temperature Sensor Module, Button Switch Module, Schock Switch Module, IR Receiver Module, Active Buzzer module, Passive Buzzer Module, Laser Module, SMD RGB LED Module, Photo-Interrupter Module, Two Color LED Module(5mm), Light Dependent Resistor Module, Large Microphone Module, Reed Switch Module, Digital Temperature Sensor, Linear Magnetic Hall Sensor, Linear Magnetic Hall Sensor, Seven-Color flash Module, Joystick Module, Line tracking module, Relay Module, Obstacle Avoidance Sensor, LCD Display, Ultrasonic Sensor Module, MPU6050 Module, HC-SR501 PIR Sensor, Water Level Detection Sensor Module and Keypad Module.

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FPGA Digital programming

To summarize, counter architecture is chosen for its simplicity of implementation as a function reset and output. Design choice two is chosen for the short reset with a two-state reset. The specified table is translated into the present and following states in the design synthesis with two outputs and four inputs. Remarkably, the pseudocode is derived accordingly for the reset function, and the state's outputs and inputs are decoded into four-bit binary and two-bit binary values for transformation into Verilog coding. As for the output function, the four inputs and their respective resets with two outputs are coded in Verilog inside the output function. Interestingly, the inputs, outputs, and states use the two-bit and forward-bit binary. For the evaluation of the outputs in vector waveform, all the Verilog codes are working perfectly because the twelve and six states reset is resetting and starting correctly, while the four-state reset is repeating every four states and the two-state reset start and reset in alignment with its exact state one and two. If implementing the Verilog code at the gate level, the gate-level output logic requires coding within a dedicated module. Additionally, the declaration of input, output, and wire signals is necessary. Interestingly, the task1 module instance parameters should be adjusted according to the specifications in the main modules.

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